General Integration of Vertical Nanowire Arrays with Silicon for Highly Parallel Electronic Device Applications - Jon E. Evans; Alex Lord; Nathan A. Smith; Michael B. Ward; Steve Wilks (The Journal of Physical Chemistry C, 2018)
Near-term commercialization of nanowire-based devices is possible through an integrative approach with existing semiconductor platforms. Research-based single nanowire devices suffer from issues related to size dependence and variability; hence, the use of a large number of nanowires in parallel is a prerequisite for real-world devices to scale output and provide statistical averaging of properties. Parallel integration is most directly achieved through electrical contacting of nanowire arrays in the as-grown vertical configuration. Here, we demonstrate a one-step process that overcomes several technological barriers simultaneously, allowing the seamless electrical integration of ZnO nanowire arrays with industry standard silicon substrates. Our seamless integration process is based on the deposition of a metal contact layer on silicon and subsequent CVD nanowire growth. Combined SEM, XRD, and TEM measurements show compositional and structural changes to each metal contact layer candidate during the high-temperature growth process, directly influencing the ZnO base growth and controlling the properties and dimensions of the resulting nanowire arrays. Findings were correlated to nanoscale multiprobe electrical measurements of individual nanowires in the vertical device configuration to demonstrate the effects of each metal layer on conduction through the nanowires and the metal–semiconductor interface. The refractory metal molybdenum gave highly aligned, dense nanowire growth and formed a low-resistance ohmic contact to the base of these arrays offering a simple and scalable process-ready solution for integrating nanowires with the industry standard silicon platform.