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Parallel Implementation of Reinforcement Learning Q-Learning Technique for FPGA
Lucileide M. D. Da Silva,
Matheus Torquato 
,
Marcelo A. C. Fernandes
,
Marcelo A. C. Fernandes
IEEE Access, Volume: 7, Pages: 2782 - 2798
Swansea University Author:
Matheus Torquato
-
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DOI (Published version): 10.1109/ACCESS.2018.2885950
Abstract
Q-learning is an off-policy reinforcement learning technique, which has the main advantage of obtaining an optimal policy interacting with an unknown model environment. This paper proposes a parallel fixed-point Q-learning algorithm architecture implemented on field programmable gate arrays (FPGA) f...
| Published in: | IEEE Access |
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| ISSN: | 2169-3536 |
| Published: |
2019
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| Online Access: |
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| URI: | https://cronfa.swan.ac.uk/Record/cronfa49022 |
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| Abstract: |
Q-learning is an off-policy reinforcement learning technique, which has the main advantage of obtaining an optimal policy interacting with an unknown model environment. This paper proposes a parallel fixed-point Q-learning algorithm architecture implemented on field programmable gate arrays (FPGA) focusing on optimizing the system processing time. The convergence results are presented, and the processing time and occupied area were analyzed for different states and actions sizes scenarios and various fixed-point formats. The studies concerning the accuracy of the Q-learning technique response and resolution error associated with a decrease in the number of bits were also carried out for hardware implementation. The architecture implementation details were featured. The entire project was developed using the system generator platform (Xilinx), with a Virtex-6 xc6vcx240t-1ff1156 as the target FPGA. |
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| College: |
Faculty of Science and Engineering |
| Start Page: |
2782 |
| End Page: |
2798 |