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A study of latch-up robustness for a new p-buffer CMOS based Power IC Technology architecture

P.M Holland, M. P Elwin, S Batcup, Z Zhou, P. M Igic, Paul Holland

Microelectronics, 2008. MIEL 2008. 26th International Conference on, Pages: 177 - 179

Swansea University Author: Paul Holland

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DOI (Published version): 10.1109/ICMEL.2008.4559252

Published in: Microelectronics, 2008. MIEL 2008. 26th International Conference on
Published: 2008
URI: https://cronfa.swan.ac.uk/Record/cronfa5751
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Item Description: A study of latch-up robustness for a new p-buffer CMOS based Power IC Technology architecture.This paper presents a novel approach to implement a high voltage transistor into a CMOS process and study the effects on circuit reliability.
College: Faculty of Science and Engineering
Start Page: 177
End Page: 179