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Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics / FINNIAN MONAGHAN

Swansea University Author: FINNIAN MONAGHAN

DOI (Published version): 10.23889/SUThesis.70068

Abstract

Silicon Carbide (SiC) power devices are becoming popular in a variety of different applications, however one un-tapped sector for SiC is the circuit protection market. Specifically depletion-mode SiC JFETs could be utilised in over-current/voltage protection products such as Bourns’ Transient Blockin...

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Published: Swansea University, Wales, UK 2025
Institution: Swansea University
Degree level: Doctoral
Degree name: EngD
Supervisor: Jennings, M. R., and Martinez, A. E.
URI: https://cronfa.swan.ac.uk/Record/cronfa70068
first_indexed 2025-07-31T10:10:17Z
last_indexed 2025-10-21T06:05:38Z
id cronfa70068
recordtype RisThesis
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spelling 2025-10-20T09:50:30.1641715 v2 70068 2025-07-31 Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics f01c51c032f1926783dc4903a9f674d2 FINNIAN MONAGHAN FINNIAN MONAGHAN true false 2025-07-31 Silicon Carbide (SiC) power devices are becoming popular in a variety of different applications, however one un-tapped sector for SiC is the circuit protection market. Specifically depletion-mode SiC JFETs could be utilised in over-current/voltage protection products such as Bourns’ Transient Blocking Unit (TBU®) product line to enhance efficiency, and penetrate previously unfeasible high voltage markets. This thesis investigates and begins the development of 4H-SiC JFETs specifically de-signed for the TBU® application. Extensive optimisation of the JFET cell and termination design are explored using finite-element simulations. The trade-off between JFET off-state performance and design parameters is identified. For the first time, Short Channel Effects (SCEs) are comprehensively shown to affect JFET behaviour when the channel length is short. In particular, JFET breakdown voltage can be degraded to only 50V for a 1200V drift region if channel length is short. It is demonstrated that by introducing sidewall P-type implants, the JFET channel can be extended without requiring high implantation energies, and completely eliminates the premature device failure caused by SCEs. This is demonstrated to improve breakdown voltage by 1000V in some cases. A new 4H-SiC JFET design integrating a temperature sensor on the semiconductor surface is also demonstrated using finite-element simulations. The sensor consists of a lateral P-type resistor formed simultaneously with the P+ gate junction. Electrothermal simulationswere employed to consider device self-heating effects showed the sensor had an R2 of 0.996,which is comparable to other 4H-SiC temperature sensors. The sensor was also shown to be stable under high drain bias when blocking, with Isens only varying by 4% between Vd= 0V and 1000V. Process optimization was also completed on three key elements of the JFET fabrication process: carbon capping layers used for surface protection, P-type implant activation, and P-type ohmic contacts. The P+ gate junction is a fundamental part of the JFET unit cell structure. It was found that Tanneal= 1700°C resulted in the highest percentage of implanted dopants becoming electrically, with 26.9% activation. Furthermore, it was also found that ohmic contacts using the Ti/Al/Ni metal scheme offered the lowest specific contact resistivity of 4.91 106Ωcm2, which was achieved after annealing at 1050°C for 2 minutes. E-Thesis Swansea University, Wales, UK Silicon Carbide, Power Electronics, JFET, TCAD, ohmic contact 18 6 2025 2025-06-18 10.23889/SUThesis.70068 COLLEGE NANME COLLEGE CODE Swansea University Jennings, M. R., and Martinez, A. E. Doctoral EngD Coated M2A CDT, Bourns. Inc Coated M2A CDT, Bourns. Inc 2025-10-20T09:50:30.1641715 2025-07-31T11:01:20.0090934 Faculty of Science and Engineering School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering FINNIAN MONAGHAN 1 70068__35392__97ac0cc3eb7f462ea3cdde808c9fb075.pdf 2025_Monaghan_F.final.70068_Compressed_Cronfa.pdf 2025-10-20T09:47:09.7361423 Output 5391910 application/pdf E-Thesis – open access true Copyright: The Author, Finn Monaghan, 2025. true eng
title Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
spellingShingle Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
FINNIAN MONAGHAN
title_short Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
title_full Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
title_fullStr Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
title_full_unstemmed Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
title_sort Development of Silicon Carbide Devices for Next-Generation Surge Protection and Power Electronics
author_id_str_mv f01c51c032f1926783dc4903a9f674d2
author_id_fullname_str_mv f01c51c032f1926783dc4903a9f674d2_***_FINNIAN MONAGHAN
author FINNIAN MONAGHAN
author2 FINNIAN MONAGHAN
format E-Thesis
publishDate 2025
institution Swansea University
doi_str_mv 10.23889/SUThesis.70068
college_str Faculty of Science and Engineering
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hierarchy_top_id facultyofscienceandengineering
hierarchy_top_title Faculty of Science and Engineering
hierarchy_parent_id facultyofscienceandengineering
hierarchy_parent_title Faculty of Science and Engineering
department_str School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering{{{_:::_}}}Faculty of Science and Engineering{{{_:::_}}}School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering
document_store_str 1
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description Silicon Carbide (SiC) power devices are becoming popular in a variety of different applications, however one un-tapped sector for SiC is the circuit protection market. Specifically depletion-mode SiC JFETs could be utilised in over-current/voltage protection products such as Bourns’ Transient Blocking Unit (TBU®) product line to enhance efficiency, and penetrate previously unfeasible high voltage markets. This thesis investigates and begins the development of 4H-SiC JFETs specifically de-signed for the TBU® application. Extensive optimisation of the JFET cell and termination design are explored using finite-element simulations. The trade-off between JFET off-state performance and design parameters is identified. For the first time, Short Channel Effects (SCEs) are comprehensively shown to affect JFET behaviour when the channel length is short. In particular, JFET breakdown voltage can be degraded to only 50V for a 1200V drift region if channel length is short. It is demonstrated that by introducing sidewall P-type implants, the JFET channel can be extended without requiring high implantation energies, and completely eliminates the premature device failure caused by SCEs. This is demonstrated to improve breakdown voltage by 1000V in some cases. A new 4H-SiC JFET design integrating a temperature sensor on the semiconductor surface is also demonstrated using finite-element simulations. The sensor consists of a lateral P-type resistor formed simultaneously with the P+ gate junction. Electrothermal simulationswere employed to consider device self-heating effects showed the sensor had an R2 of 0.996,which is comparable to other 4H-SiC temperature sensors. The sensor was also shown to be stable under high drain bias when blocking, with Isens only varying by 4% between Vd= 0V and 1000V. Process optimization was also completed on three key elements of the JFET fabrication process: carbon capping layers used for surface protection, P-type implant activation, and P-type ohmic contacts. The P+ gate junction is a fundamental part of the JFET unit cell structure. It was found that Tanneal= 1700°C resulted in the highest percentage of implanted dopants becoming electrically, with 26.9% activation. Furthermore, it was also found that ohmic contacts using the Ti/Al/Ni metal scheme offered the lowest specific contact resistivity of 4.91 106Ωcm2, which was achieved after annealing at 1050°C for 2 minutes.
published_date 2025-06-18T18:02:55Z
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score 11.08899

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