The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation

Ahmeda, K.; Ubochi, B.; Alqaysi, M.H.; Al-Khalidi, A.; Wasige, E.; Kalna, Karol

doi:10.1016/j.microrel.2020.113965

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The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation

K. Ahmeda, B. Ubochi, M.H. Alqaysi, A. Al-Khalidi, E. Wasige, Karol Kalna

Microelectronics Reliability, Volume: 115, Start page: 113965

Swansea University Author: Karol Kalna

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DOI (Published version): 10.1016/j.microrel.2020.113965

Abstract

The thickness increase of gallium nitride (GaN) cap layer from 2 nm to 35 nm to achieve an enhancement mode GaN MIS-HEMT (Metal-Insulator-Semiconductor High-Electron-Mobility Transistor) with a threshold voltage (Vth) of +0.5 V is studied using TCAD simulations. The simulations are calibrated to mea...

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Published in:	Microelectronics Reliability
ISSN:	0026-2714
Published:	Elsevier BV 2020
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URI:	https://cronfa.swan.ac.uk/Record/cronfa55553
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first_indexed	2020-10-29T11:37:09Z
last_indexed	2020-12-04T04:10:19Z
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spelling	2020-12-03T13:27:29.7997957 v2 55553 2020-10-29 The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation 1329a42020e44fdd13de2f20d5143253 0000-0002-6333-9189 Karol Kalna Karol Kalna true false 2020-10-29 EEEG The thickness increase of gallium nitride (GaN) cap layer from 2 nm to 35 nm to achieve an enhancement mode GaN MIS-HEMT (Metal-Insulator-Semiconductor High-Electron-Mobility Transistor) with a threshold voltage (Vth) of +0.5 V is studied using TCAD simulations. The simulations are calibrated to measured I-V characteristics of the 1 μm gate length GaN MIS-HEMT with the 2 nm thick GaN cap. A good agreement at low and high drain voltages (VDS=1 V and 5 V) between simulations and measurements is achieved by using a quantum-corrected drift-diffusion transport model. The enhancement mode GaN MIS-HEMT with a GaN cap thickness of 35 nm achieves Vth = + 0.5 V thanks to positive interface traps occurring between the SiN passivation layer and the GaN cap as reported experimentally. The simulations indicate that a parasitic channel is created at the interface between the SiN layer and the 35 nm GaN cap. Our study also shows an increase in the breakdown voltage from 100 V to 870 V when a thickness of the GaN cap layer increases from 15 nm to 35 nm. Journal Article Microelectronics Reliability 115 113965 Elsevier BV 0026-2714 GaN HEMT, Enhancement mode, Interface traps, Parasitic channel, Cap layer 1 12 2020 2020-12-01 10.1016/j.microrel.2020.113965 COLLEGE NANME Electronic and Electrical Engineering COLLEGE CODE EEEG Swansea University 2020-12-03T13:27:29.7997957 2020-10-29T11:35:23.9660869 Faculty of Science and Engineering School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering K. Ahmeda 1 B. Ubochi 2 M.H. Alqaysi 3 A. Al-Khalidi 4 E. Wasige 5 Karol Kalna 0000-0002-6333-9189 6 55553__18541__3ddb41737243410fb893bbc76b2ac902.pdf 55553.pdf 2020-10-30T09:06:21.4119808 Output 771557 application/pdf Accepted Manuscript true 2021-10-23T00:00:00.0000000 © 2020. This manuscript version is made available under the CC-BY-NC-ND 4.0 license true eng http://creativecommons.org/licenses/by-nc-nd/4.0/
title	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
spellingShingle	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation Karol Kalna
title_short	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
title_full	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
title_fullStr	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
title_full_unstemmed	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
title_sort	The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
author_id_str_mv	1329a42020e44fdd13de2f20d5143253
author_id_fullname_str_mv	1329a42020e44fdd13de2f20d5143253_***_Karol Kalna
author	Karol Kalna
author2	K. Ahmeda B. Ubochi M.H. Alqaysi A. Al-Khalidi E. Wasige Karol Kalna
format	Journal article
container_title	Microelectronics Reliability
container_volume	115
container_start_page	113965
publishDate	2020
institution	Swansea University
issn	0026-2714
doi_str_mv	10.1016/j.microrel.2020.113965
publisher	Elsevier BV
college_str	Faculty of Science and Engineering
hierarchytype
hierarchy_top_id	facultyofscienceandengineering
hierarchy_top_title	Faculty of Science and Engineering
hierarchy_parent_id	facultyofscienceandengineering
hierarchy_parent_title	Faculty of Science and Engineering
department_str	School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering{{{_:::_}}}Faculty of Science and Engineering{{{_:::_}}}School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering
document_store_str	1
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description	The thickness increase of gallium nitride (GaN) cap layer from 2 nm to 35 nm to achieve an enhancement mode GaN MIS-HEMT (Metal-Insulator-Semiconductor High-Electron-Mobility Transistor) with a threshold voltage (Vth) of +0.5 V is studied using TCAD simulations. The simulations are calibrated to measured I-V characteristics of the 1 μm gate length GaN MIS-HEMT with the 2 nm thick GaN cap. A good agreement at low and high drain voltages (VDS=1 V and 5 V) between simulations and measurements is achieved by using a quantum-corrected drift-diffusion transport model. The enhancement mode GaN MIS-HEMT with a GaN cap thickness of 35 nm achieves Vth = + 0.5 V thanks to positive interface traps occurring between the SiN passivation layer and the GaN cap as reported experimentally. The simulations indicate that a parasitic channel is created at the interface between the SiN layer and the 35 nm GaN cap. Our study also shows an increase in the breakdown voltage from 100 V to 870 V when a thickness of the GaN cap layer increases from 15 nm to 35 nm.
published_date	2020-12-01T04:09:51Z
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score	11.016235

The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation

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