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Conference Paper/Proceeding/Abstract 1217 views

Optimisation of 100V high side LDMOS using multiple simulation techniques

M Elwin, P Holland, I Anteney, J Ellis, L Armstrong, G Birchby, P Igic, Paul Holland

Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on, Pages: 104 - 107

Swansea University Author: Paul Holland

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Published in: Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on
ISSN: 1943-653X
Published: 2009
Online Access: Check full text

URI: https://cronfa.swan.ac.uk/Record/cronfa5750
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Item Description: This paper presents state-of-the-art 2-D and 3-D finite element techniques in CMOS design to implement a now commercially available CMOS High Voltage Platform designed by Dr Holland at Swansea University in Collaboration with the largest two semiconductor companies in the UK.
College: Faculty of Science and Engineering
Start Page: 104
End Page: 107