Conference Paper/Proceeding/Abstract 460 views
Optimisation of 100V high side LDMOS using multiple simulation techniques / Paul, Holland
Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on, Pages: 104 - 107
Swansea University Author: Paul, Holland
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Optimisation of 100V high side LDMOS using multiple simulation techniques
|Published in:||Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on|
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This paper presents state-of-the-art 2-D and 3-D finite element techniques in CMOS design to implement a now commercially available CMOS High Voltage Platform designed by Dr Holland at Swansea University in Collaboration with the largest two semiconductor companies in the UK.
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