Journal article 1073 views
Benchmarking of Scaled InGaAs Implant-Free NanoMOSFETs
K Kalna,
N Seoane,
A.J Garcia-Loureiro,
I.G Thayne,
A Asenov,
Karol Kalna 
IEEE Transactions on Electron Devices, Volume: 55, Issue: 9, Pages: 2297 - 2306
Swansea University Author:
Karol Kalna
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DOI (Published version): 10.1109/TED.2008.927658
Abstract
Benchmarking of Scaled InGaAs Implant-Free NanoMOSFETs
| Published in: | IEEE Transactions on Electron Devices |
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| ISSN: | 0018-9383 |
| Published: |
2008
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| Online Access: |
Check full text
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| URI: | https://cronfa.swan.ac.uk/Record/cronfa6074 |
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| Item Description: |
A novel, n-type implant-free III-V MOSFETs with a high indium content (In0.75Ga0.25As) channel is studied using state-of-the-art finite-element heterostructure Monte Carlo and parallel 3-D drift-diffusion simulations. The device design is a result of 3-year No. 1 ranked STREP FP7 Project DUALLOGIC with 8 European Partners and two large EPSRC grants to develop III-V MOSFETs (Sub 100 nm III-V MOSFETs for Digital Applications and III-V MOSFETs for Ultimate CMOS ). III-V MOSFETs are currently intensively investigated for future digital application for the 15 or 11 nm CMOS technology with substantially funded R&D (~$100M) by Intel, IBM, SEMATECH and SELETE. |
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| College: |
Faculty of Science and Engineering |
| Issue: |
9 |
| Start Page: |
2297 |
| End Page: |
2306 |