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Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates

Saptarsi Ghosh Orcid Logo, M. Sarkar Orcid Logo, M. Frentrup Orcid Logo, M. J. Kappers Orcid Logo, R. A. Oliver Orcid Logo

Journal of Applied Physics, Volume: 136, Issue: 4

Swansea University Author: Saptarsi Ghosh Orcid Logo

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DOI (Published version): 10.1063/5.0216672

Abstract

Distributed Bragg reflectors (DBRs) based on alternating layers of porous and non-porous GaN have previously been fabricated at the wafer-scale in heteroepitaxial GaN layers grown on sapphire substrates. Porosification is achieved via the electrochemical etching of highly Si-doped layers, and the et...

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Published in: Journal of Applied Physics
ISSN: 0021-8979 1089-7550
Published: AIP Publishing 2024
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URI: https://cronfa.swan.ac.uk/Record/cronfa67275
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spelling v2 67275 2024-07-31 Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates 3e247ecabd6eddd319264d066b0ce959 0000-0003-1685-6228 Saptarsi Ghosh Saptarsi Ghosh true false 2024-07-31 ACEM Distributed Bragg reflectors (DBRs) based on alternating layers of porous and non-porous GaN have previously been fabricated at the wafer-scale in heteroepitaxial GaN layers grown on sapphire substrates. Porosification is achieved via the electrochemical etching of highly Si-doped layers, and the etchant accesses the n+-GaN layers through nanoscale channels arising at threading dislocations that are ubiquitous in the heteroepitaxial growth process. Here, we show that the same process applies to GaN multilayer structures grown on silicon substrates. The reflectance of the resulting DBRs depends on the voltage at which the porosification process is carried out. Etching at higher voltages yields higher porosities. However, while an increase in porosity is theoretically expected to lead to peak reflectance, in practice, the highest reflectance is achieved at a moderate etching voltage because etching at higher voltages leads to pore formation in the nominally non-porous layers, pore coarsening in the porous layers, and in the worst cases layer collapse. We also find that at the high threading dislocation densities present in these samples, not all dislocations participate in the etching process at low and moderate etching voltages. However, the number of dislocations involved in the process increases with etching voltage. Journal Article Journal of Applied Physics 136 4 AIP Publishing 0021-8979 1089-7550 22 7 2024 2024-07-22 10.1063/5.0216672 COLLEGE NANME Aerospace, Civil, Electrical, and Mechanical Engineering COLLEGE CODE ACEM Swansea University Another institution paid the OA fee This research was supported by the EPSRC under Grant Nos. EP/R03480X/1, EP/W03557X/1, EP/X015300/1, EP/N509620/1, and EP/R513180/1. Rachel Oliver would like to acknowledge funding from the Royal Academy of Engineering under the Chairs in Emerging Technologies Scheme, which is sponsored by the Department for Science, Innovation and Technology (DSIT). We thank Clifford McAleese for his work on the transfer matrix model. 2024-08-05T16:12:26.1544588 2024-07-31T20:39:43.1956165 Faculty of Science and Engineering School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering Saptarsi Ghosh 0000-0003-1685-6228 1 M. Sarkar 0000-0001-6156-5089 2 M. Frentrup 0000-0002-1726-3099 3 M. J. Kappers 0000-0002-6566-0742 4 R. A. Oliver 0000-0003-0029-3993 5 67275__31050__f7a7df6b0ee5491a85b59a5cc22512c1.pdf 67275.VoR.pdf 2024-08-05T16:09:23.5086322 Output 5038079 application/pdf Version of Record true © 2024 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license. true eng https://creativecommons.org/licenses/by/4.0/
title Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
spellingShingle Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
Saptarsi Ghosh
title_short Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
title_full Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
title_fullStr Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
title_full_unstemmed Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
title_sort Microstructure and reflectance of porous GaN distributed Bragg reflectors on silicon substrates
author_id_str_mv 3e247ecabd6eddd319264d066b0ce959
author_id_fullname_str_mv 3e247ecabd6eddd319264d066b0ce959_***_Saptarsi Ghosh
author Saptarsi Ghosh
author2 Saptarsi Ghosh
M. Sarkar
M. Frentrup
M. J. Kappers
R. A. Oliver
format Journal article
container_title Journal of Applied Physics
container_volume 136
container_issue 4
publishDate 2024
institution Swansea University
issn 0021-8979
1089-7550
doi_str_mv 10.1063/5.0216672
publisher AIP Publishing
college_str Faculty of Science and Engineering
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hierarchy_top_id facultyofscienceandengineering
hierarchy_top_title Faculty of Science and Engineering
hierarchy_parent_id facultyofscienceandengineering
hierarchy_parent_title Faculty of Science and Engineering
department_str School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering{{{_:::_}}}Faculty of Science and Engineering{{{_:::_}}}School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering
document_store_str 1
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description Distributed Bragg reflectors (DBRs) based on alternating layers of porous and non-porous GaN have previously been fabricated at the wafer-scale in heteroepitaxial GaN layers grown on sapphire substrates. Porosification is achieved via the electrochemical etching of highly Si-doped layers, and the etchant accesses the n+-GaN layers through nanoscale channels arising at threading dislocations that are ubiquitous in the heteroepitaxial growth process. Here, we show that the same process applies to GaN multilayer structures grown on silicon substrates. The reflectance of the resulting DBRs depends on the voltage at which the porosification process is carried out. Etching at higher voltages yields higher porosities. However, while an increase in porosity is theoretically expected to lead to peak reflectance, in practice, the highest reflectance is achieved at a moderate etching voltage because etching at higher voltages leads to pore formation in the nominally non-porous layers, pore coarsening in the porous layers, and in the worst cases layer collapse. We also find that at the high threading dislocation densities present in these samples, not all dislocations participate in the etching process at low and moderate etching voltages. However, the number of dislocations involved in the process increases with etching voltage.
published_date 2024-07-22T16:12:24Z
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