Journal article 319 views 97 downloads
GaAs Growth on Ge‐Buffered Discontinuous (111)‐Faceted V‐Groove Silicon Substrates
,
Hui Jia ,
Mateus G. Masteghin ,
Yaonan Hou ,
Haotian Zeng ,
Huiwen Deng,
Jae‐Seong Park,
Chong Chen,
Jun Li,
Xingzhao Yan ,
Ilias Skandalos ,
Frederic Gardes,
Mingchu Tang,
Alwyn Seeds ,
Huiyun Liu
Advanced Physics Research, Volume: 4, Issue: 9, Start page: 2500026
Swansea University Author:
Yaonan Hou
-
PDF | Version of Record
© 2025 The Author(s). This is an open access article under the terms of the Creative Commons Attribution License (CC BY).
Download (2.28MB)
DOI (Published version): 10.1002/apxr.202500026
Abstract
The propagation of antiphase boundaries (APBs) and threading dislocations (TDs) poses a significant impediment to the realisation of high‐quality group III–V semiconductors grown on group IV platforms. The complete annihilation of APBs and a substantial reduction in threading dislocation density (TD...
| Published in: | Advanced Physics Research |
|---|---|
| ISSN: | 2751-1200 |
| Published: |
Wiley
2025
|
| Online Access: |
Check full text
|
| URI: | https://cronfa.swan.ac.uk/Record/cronfa69543 |
| Abstract: |
The propagation of antiphase boundaries (APBs) and threading dislocations (TDs) poses a significant impediment to the realisation of high‐quality group III–V semiconductors grown on group IV platforms. The complete annihilation of APBs and a substantial reduction in threading dislocation density (TDD) are essential for achieving high‐efficiency III–V devices compatible with complementary metal‐oxide semiconductor (CMOS) technology. In this study, a novel growth technique is proposed and developed to fabricate a faceted germanium (Ge) buffer on a discontinuous (111)‐faceted V‐groove silicon (Si) substrate with a 500 nm flat ridge width. Subsequently, a GaAs buffer is grown on the Ge/V‐groove Si virtual substrate using a ramped temperature growth process to minimise the prevalence of line and planar defects in the buffer structure. An APB‐free GaAs buffer is successfully achieved, as confirmed by cross‐sectional and plan‐view transmission electron microscopy (TEM) and atomic force microscopy (AFM) analyses. The faceted Ge buffer layer obtained through this innovative approach alleviates the stringent fabrication requirements and intricate processing typically associated with conventional continuous V‐groove Si substrates. This advancement facilitates the development of photonic integrated circuits by providing a simplified and efficient alternative substrate solution. |
|---|---|
| Keywords: |
antiphase boundaries, aspect ratio trapping, threading dislocations, v-groove |
| College: |
Faculty of Science and Engineering |
| Funders: |
This work was supported by the UK Engineering and Physical Sciences Research Council (EP/Z532848/1, EP/X015300/1, EP/T028475/1, EP/S024441/1, and EP/P006973/1). |
| Issue: |
9 |
| Start Page: |
2500026 |