No Cover Image

Journal article 795 views 229 downloads

High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs

Dean P. Hamilton, Mike Jennings Orcid Logo, Amador Perez-Tomas, Stephen A. O. Russell, Steven A. Hindmarsh, Craig A. Fisher, Philip A. Mawby

IEEE Transactions on Power Electronics, Volume: 32, Issue: 10, Pages: 7967 - 7979

Swansea University Author: Mike Jennings Orcid Logo

Abstract

The temperature dependence and stability of three different commercially-available unpackaged SiC Dmosfets have been measured. On-state resistances increased to 6 or 7 times their room temperature values at 350 °C. Threshold voltages almost doubled after tens of minutes of positive gate voltage stre...

Full description

Published in: IEEE Transactions on Power Electronics
ISSN: 0885-8993 1941-0107
Published: 2017
Online Access: Check full text

URI: https://cronfa.swan.ac.uk/Record/cronfa49902
Tags: Add Tag
No Tags, Be the first to tag this record!
first_indexed 2019-04-08T10:16:42Z
last_indexed 2020-11-04T04:01:56Z
id cronfa49902
recordtype SURis
fullrecord <?xml version="1.0"?><rfc1807><datestamp>2020-11-03T13:42:01.1159174</datestamp><bib-version>v2</bib-version><id>49902</id><entry>2019-04-05</entry><title>High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs</title><swanseaauthors><author><sid>e0ba5d7ece08cd70c9f8f8683996454a</sid><ORCID>0000-0003-3270-0805</ORCID><firstname>Mike</firstname><surname>Jennings</surname><name>Mike Jennings</name><active>true</active><ethesisStudent>false</ethesisStudent></author></swanseaauthors><date>2019-04-05</date><deptcode>EEEG</deptcode><abstract>The temperature dependence and stability of three different commercially-available unpackaged SiC Dmosfets have been measured. On-state resistances increased to 6 or 7 times their room temperature values at 350 &#xB0;C. Threshold voltages almost doubled after tens of minutes of positive gate voltage stressing at 300 &#xB0;C, but approached their original values again after only one or two minutes of negative gate bias stressing. Fortunately, the change in drain current due to these threshold instabilities was almost negligible. However, the threshold approaches zero volts at high temperatures after a high temperature negative gate bias stress. The zero gate bias leakage is low until the threshold voltage reduces to approximately 150 mV, where-after the leakage increases exponentially. Thermal aging tests demonstrated a sudden change from linear to nonlinear output characteristics after 24-100 h air storage at 300 &#xB0;C and after 570-1000 h in N2 atmosphere. We attribute this to nickel oxide growth on the drain contact metallization which forms a heterojunction p-n diode with the SiC substrate. It was determined that these state-of-the-art SiC mosfet devices may be operated in real applications at temperatures far exceeding their rated operating temperatures.</abstract><type>Journal Article</type><journal>IEEE Transactions on Power Electronics</journal><volume>32</volume><journalNumber>10</journalNumber><paginationStart>7967</paginationStart><paginationEnd>7979</paginationEnd><publisher/><placeOfPublication/><isbnPrint/><isbnElectronic/><issnPrint>0885-8993</issnPrint><issnElectronic>1941-0107</issnElectronic><keywords/><publishedDay>31</publishedDay><publishedMonth>12</publishedMonth><publishedYear>2017</publishedYear><publishedDate>2017-12-31</publishedDate><doi>10.1109/TPEL.2016.2636743</doi><url/><notes/><college>COLLEGE NANME</college><department>Electronic and Electrical Engineering</department><CollegeCode>COLLEGE CODE</CollegeCode><DepartmentCode>EEEG</DepartmentCode><institution>Swansea University</institution><apcterm/><lastEdited>2020-11-03T13:42:01.1159174</lastEdited><Created>2019-04-05T09:30:08.7901876</Created><path><level id="1">Faculty of Science and Engineering</level><level id="2">School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering</level></path><authors><author><firstname>Dean P.</firstname><surname>Hamilton</surname><order>1</order></author><author><firstname>Mike</firstname><surname>Jennings</surname><orcid>0000-0003-3270-0805</orcid><order>2</order></author><author><firstname>Amador</firstname><surname>Perez-Tomas</surname><order>3</order></author><author><firstname>Stephen A. O.</firstname><surname>Russell</surname><order>4</order></author><author><firstname>Steven A.</firstname><surname>Hindmarsh</surname><order>5</order></author><author><firstname>Craig A.</firstname><surname>Fisher</surname><order>6</order></author><author><firstname>Philip A.</firstname><surname>Mawby</surname><order>7</order></author></authors><documents><document><filename>49902__17595__c1bbf5118855416fa39654ecabef9c6f.pdf</filename><originalFilename>hamilton2016v2 searchable.pdf</originalFilename><uploaded>2020-06-29T13:14:48.8090830</uploaded><type>Output</type><contentLength>25152576</contentLength><contentType>application/pdf</contentType><version>Accepted Manuscript</version><cronfaStatus>true</cronfaStatus><copyrightCorrect>true</copyrightCorrect></document></documents><OutputDurs/></rfc1807>
spelling 2020-11-03T13:42:01.1159174 v2 49902 2019-04-05 High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs e0ba5d7ece08cd70c9f8f8683996454a 0000-0003-3270-0805 Mike Jennings Mike Jennings true false 2019-04-05 EEEG The temperature dependence and stability of three different commercially-available unpackaged SiC Dmosfets have been measured. On-state resistances increased to 6 or 7 times their room temperature values at 350 °C. Threshold voltages almost doubled after tens of minutes of positive gate voltage stressing at 300 °C, but approached their original values again after only one or two minutes of negative gate bias stressing. Fortunately, the change in drain current due to these threshold instabilities was almost negligible. However, the threshold approaches zero volts at high temperatures after a high temperature negative gate bias stress. The zero gate bias leakage is low until the threshold voltage reduces to approximately 150 mV, where-after the leakage increases exponentially. Thermal aging tests demonstrated a sudden change from linear to nonlinear output characteristics after 24-100 h air storage at 300 °C and after 570-1000 h in N2 atmosphere. We attribute this to nickel oxide growth on the drain contact metallization which forms a heterojunction p-n diode with the SiC substrate. It was determined that these state-of-the-art SiC mosfet devices may be operated in real applications at temperatures far exceeding their rated operating temperatures. Journal Article IEEE Transactions on Power Electronics 32 10 7967 7979 0885-8993 1941-0107 31 12 2017 2017-12-31 10.1109/TPEL.2016.2636743 COLLEGE NANME Electronic and Electrical Engineering COLLEGE CODE EEEG Swansea University 2020-11-03T13:42:01.1159174 2019-04-05T09:30:08.7901876 Faculty of Science and Engineering School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering Dean P. Hamilton 1 Mike Jennings 0000-0003-3270-0805 2 Amador Perez-Tomas 3 Stephen A. O. Russell 4 Steven A. Hindmarsh 5 Craig A. Fisher 6 Philip A. Mawby 7 49902__17595__c1bbf5118855416fa39654ecabef9c6f.pdf hamilton2016v2 searchable.pdf 2020-06-29T13:14:48.8090830 Output 25152576 application/pdf Accepted Manuscript true true
title High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
spellingShingle High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
Mike Jennings
title_short High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
title_full High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
title_fullStr High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
title_full_unstemmed High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
title_sort High-Temperature Electrical and Thermal Aging Performance and Application Considerations for SiC Power DMOSFETs
author_id_str_mv e0ba5d7ece08cd70c9f8f8683996454a
author_id_fullname_str_mv e0ba5d7ece08cd70c9f8f8683996454a_***_Mike Jennings
author Mike Jennings
author2 Dean P. Hamilton
Mike Jennings
Amador Perez-Tomas
Stephen A. O. Russell
Steven A. Hindmarsh
Craig A. Fisher
Philip A. Mawby
format Journal article
container_title IEEE Transactions on Power Electronics
container_volume 32
container_issue 10
container_start_page 7967
publishDate 2017
institution Swansea University
issn 0885-8993
1941-0107
doi_str_mv 10.1109/TPEL.2016.2636743
college_str Faculty of Science and Engineering
hierarchytype
hierarchy_top_id facultyofscienceandengineering
hierarchy_top_title Faculty of Science and Engineering
hierarchy_parent_id facultyofscienceandengineering
hierarchy_parent_title Faculty of Science and Engineering
department_str School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering{{{_:::_}}}Faculty of Science and Engineering{{{_:::_}}}School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering
document_store_str 1
active_str 0
description The temperature dependence and stability of three different commercially-available unpackaged SiC Dmosfets have been measured. On-state resistances increased to 6 or 7 times their room temperature values at 350 °C. Threshold voltages almost doubled after tens of minutes of positive gate voltage stressing at 300 °C, but approached their original values again after only one or two minutes of negative gate bias stressing. Fortunately, the change in drain current due to these threshold instabilities was almost negligible. However, the threshold approaches zero volts at high temperatures after a high temperature negative gate bias stress. The zero gate bias leakage is low until the threshold voltage reduces to approximately 150 mV, where-after the leakage increases exponentially. Thermal aging tests demonstrated a sudden change from linear to nonlinear output characteristics after 24-100 h air storage at 300 °C and after 570-1000 h in N2 atmosphere. We attribute this to nickel oxide growth on the drain contact metallization which forms a heterojunction p-n diode with the SiC substrate. It was determined that these state-of-the-art SiC mosfet devices may be operated in real applications at temperatures far exceeding their rated operating temperatures.
published_date 2017-12-31T04:01:10Z
_version_ 1763753140051509248
score 11.017797