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Influence of temperature and dimension in a 4H-SiC vertical power MOSFET

MUSTAFA ALQAYSI, Antonio Martinez Muniz Orcid Logo, B Ubochi, Stephen Batcup, K Ahmeda

Engineering Research Express, Volume: 2, Issue: 4, Start page: 045020

Swansea University Authors: MUSTAFA ALQAYSI, Antonio Martinez Muniz Orcid Logo, Stephen Batcup

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Abstract

A study of the impact of dimension and temperature on a state of the art 4H-SiC power vertical DMOSFET has been carried out using drift-diffusion calculations in conjunction with electrical characterizations to extract physical parameters and doping profiles in a 6 μm channel length device. The mode...

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Published in: Engineering Research Express
ISSN: 2631-8695
Published: IOP Publishing 2020
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URI: https://cronfa.swan.ac.uk/Record/cronfa55865
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spelling 2021-03-12T13:02:24.8840351 v2 55865 2020-12-10 Influence of temperature and dimension in a 4H-SiC vertical power MOSFET c9651f82627c36aae7e19874682a8931 MUSTAFA ALQAYSI MUSTAFA ALQAYSI true false cd433784251add853672979313f838ec 0000-0001-8131-7242 Antonio Martinez Muniz Antonio Martinez Muniz true false 2c886b1d08dd1f732d4f43f4aafc1949 Stephen Batcup Stephen Batcup true false 2020-12-10 FGSEN A study of the impact of dimension and temperature on a state of the art 4H-SiC power vertical DMOSFET has been carried out using drift-diffusion calculations in conjunction with electrical characterizations to extract physical parameters and doping profiles in a 6 μm channel length device. The model presented in this paper includes the effect of trapping in the channel/oxide interface. Using these parameters, the performance of corresponding lateral and vertical scaled devices are studied. Electrothermal simulations showing self-heating effects are also carried out. The results are qualitatively discussed with the help of an analytical physical model, which considers the interplay between the different device resistances. At low drain bias, the drain current is increased by 42.86% (ID = 5 A at VG = 20 V) when reducing the dimension vertically, whereas it is decreased by 28.57% (ID = 2.5 A at VG = 20 V) when reducing the dimension laterally. These effects are enhanced at high drain bias. In addition, the effect of dimension reduction for breakdown voltage, electric field and impact ionization is investigated. A substantial reduction in breakdown voltage was found when the vertical dimensions were decreased as compared to the lateral dimensions. Journal Article Engineering Research Express 2 4 045020 IOP Publishing 2631-8695 SiC, DMOSFET, power devices, device modelling, 4H-SiC VDMOSFET 11 11 2020 2020-11-11 10.1088/2631-8695/abc52b COLLEGE NANME Science and Engineering - Faculty COLLEGE CODE FGSEN Swansea University 2021-03-12T13:02:24.8840351 2020-12-10T13:30:55.5502433 College of Engineering Engineering MUSTAFA ALQAYSI 1 Antonio Martinez Muniz 0000-0001-8131-7242 2 B Ubochi 3 Stephen Batcup 4 K Ahmeda 5 55865__18863__27a583feda014fec8ed37c60ff230244.pdf 55865.pdf 2020-12-10T13:32:51.1506810 Output 3308940 application/pdf Version of Record true © 2020 The Author(s). Released under the terms of the Creative Commons Attribution 4.0 license true eng http://creativecommons.org/licenses/by/4.0/
title Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
spellingShingle Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
MUSTAFA ALQAYSI
Antonio Martinez Muniz
Stephen Batcup
title_short Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
title_full Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
title_fullStr Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
title_full_unstemmed Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
title_sort Influence of temperature and dimension in a 4H-SiC vertical power MOSFET
author_id_str_mv c9651f82627c36aae7e19874682a8931
cd433784251add853672979313f838ec
2c886b1d08dd1f732d4f43f4aafc1949
author_id_fullname_str_mv c9651f82627c36aae7e19874682a8931_***_MUSTAFA ALQAYSI
cd433784251add853672979313f838ec_***_Antonio Martinez Muniz
2c886b1d08dd1f732d4f43f4aafc1949_***_Stephen Batcup
author MUSTAFA ALQAYSI
Antonio Martinez Muniz
Stephen Batcup
author2 MUSTAFA ALQAYSI
Antonio Martinez Muniz
B Ubochi
Stephen Batcup
K Ahmeda
format Journal article
container_title Engineering Research Express
container_volume 2
container_issue 4
container_start_page 045020
publishDate 2020
institution Swansea University
issn 2631-8695
doi_str_mv 10.1088/2631-8695/abc52b
publisher IOP Publishing
college_str College of Engineering
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hierarchy_top_title College of Engineering
hierarchy_parent_id collegeofengineering
hierarchy_parent_title College of Engineering
department_str Engineering{{{_:::_}}}College of Engineering{{{_:::_}}}Engineering
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description A study of the impact of dimension and temperature on a state of the art 4H-SiC power vertical DMOSFET has been carried out using drift-diffusion calculations in conjunction with electrical characterizations to extract physical parameters and doping profiles in a 6 μm channel length device. The model presented in this paper includes the effect of trapping in the channel/oxide interface. Using these parameters, the performance of corresponding lateral and vertical scaled devices are studied. Electrothermal simulations showing self-heating effects are also carried out. The results are qualitatively discussed with the help of an analytical physical model, which considers the interplay between the different device resistances. At low drain bias, the drain current is increased by 42.86% (ID = 5 A at VG = 20 V) when reducing the dimension vertically, whereas it is decreased by 28.57% (ID = 2.5 A at VG = 20 V) when reducing the dimension laterally. These effects are enhanced at high drain bias. In addition, the effect of dimension reduction for breakdown voltage, electric field and impact ionization is investigated. A substantial reduction in breakdown voltage was found when the vertical dimensions were decreased as compared to the lateral dimensions.
published_date 2020-11-11T04:11:08Z
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