Journal article 33 views 14 downloads
Impact of Dimensions and Doping on the Breakdown Voltage of a Trench 4H-SiC Vertical JFET
,
Craig Fisher,
Mike Jennings
Key Engineering Materials, Volume: 948, Pages: 69 - 75
Swansea University Authors:
FINNIAN MONAGHAN, Antonio Martinez Muniz , Craig Fisher, Mike Jennings
-
PDF | Version of Record
This article is an open access article under the terms and conditions of the Creative Commons Attribution (CC BY) license.
Download (615.46KB)
DOI (Published version): 10.4028/p-e6c13m
Abstract
In this paper we study the feasibility of the design/fabrication of a vertical trench 4H-SiCJunction Field Effect Transistor (JFET), assuming realistic constraints of the depth of the P+implantation. The P+ doping profile is obtained using a Monte Carlo implantation simulation. Thecalculation used a...
| Published in: | Key Engineering Materials |
|---|---|
| ISSN: | 1662-9795 |
| Published: |
Trans Tech Publications, Ltd.
2023
|
| Online Access: |
Check full text
|
| URI: | https://cronfa.swan.ac.uk/Record/cronfa66248 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Abstract: |
In this paper we study the feasibility of the design/fabrication of a vertical trench 4H-SiCJunction Field Effect Transistor (JFET), assuming realistic constraints of the depth of the P+implantation. The P+ doping profile is obtained using a Monte Carlo implantation simulation. Thecalculation used a drift-diffusion approach. The JFET aims to achieve a threshold voltage of -3V. Wefound that this constraint in concomitance with the proposed structure limits the breakdown voltageto approximately 200V. This is the result of a premature breakdown induced by short channel effects,namely Drain Induced Barrier Lowering (DIBL). However, a negative increase in the gate biasrepresses this short channel effect and improves the breakdown voltage to roughly 1800V. At thisgate bias, the breakdown is induced by reaching the critical field strength of 4H-SiC at the gate P+/Njunction, which causes avalanche generation of carriers. In addition, we have calculated thedependence of the threshold voltage on the drift doping and pillar width. This work also shows thevulnerability of the design to random fluctuation in the doping profile |
|---|---|
| Keywords: |
Vertical JFET, Threshold voltage, Breakdown Voltage, Drift diffusion simulations, Short Channel Effects |
| College: |
Faculty of Science and Engineering |
| Start Page: |
69 |
| End Page: |
75 |