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Simulation Study of Performance for a 20-nm Gate Length In0.53Ga0.47 As Implant Free Quantum Well MOSFET / Brahim Benbakhti, Antonio Martinez, Karol Kalna, Geert Hellings, Geert Eneman, Kristin De Meyer, Marc Meuris

IEEE Transactions on Nanotechnology, Volume: 11, Issue: 4, Pages: 808 - 817

Swansea University Author: Karol Kalna

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Published in: IEEE Transactions on Nanotechnology
ISSN: 1536-125X 1941-0085
Published: 2012
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Item Description: The work summarises the final results of a three-year FP7 STREP project DUALOGIC (€ 9.1M). It combines state-of-the-art simulations including drift-diffusion approach, ensemble Monte Carlo technique, and Non-Equilibrium Green’s Function method with experiment to forecast the performance of a 20 nm gate length InGaAs channel nMOSFET for a future dual-logic CMOS technology. It gives vision and guidance to semiconductor industry in the R&D for digital application how to achieve improvement in performance, functionality and density.
College: College of Engineering
Issue: 4
Start Page: 808
End Page: 817