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A Multi-Method Simulation Toolbox to Study Performance and Variability of Nanowire FETs

Natalia Seoane, Daniel Nagy, Guillermo Indalecio, Gabriel Espiñeira, Karol Kalna Orcid Logo, Antonio García-Loureiro

Materials, Volume: 12, Issue: 15, Start page: 2391

Swansea University Author: Karol Kalna Orcid Logo

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DOI (Published version): 10.3390/ma12152391

Abstract

An in-house-built three-dimensional multi-method semi-classical/classical toolbox has been developed to characterise the performance, scalability, and variability of state-of-the-art semiconductor devices. To demonstrate capabilities of the toolbox, a 10 nm gate length Si gate-all-around field-effec...

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Published in: Materials
ISSN: 1996-1944
Published: 2019
Online Access: Check full text

URI: https://cronfa.swan.ac.uk/Record/cronfa51467
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Abstract: An in-house-built three-dimensional multi-method semi-classical/classical toolbox has been developed to characterise the performance, scalability, and variability of state-of-the-art semiconductor devices. To demonstrate capabilities of the toolbox, a 10 nm gate length Si gate-all-around field-effect transistor is selected as a benchmark device. The device exhibits an off-current ( IOFF ) of 0.03 μ A/ μ m, and an on-current ( ION ) of 1770 μ A/ μ m, with the ION/IOFF ratio 6.63×104 , a value 27% larger than that of a 10.7 nm gate length Si FinFET. The device SS is 71 mV/dec, no far from the ideal limit of 60 mV/dec. The threshold voltage standard deviation due to statistical combination of four sources of variability (line- and gate-edge roughness, metal grain granularity, and random dopants) is 55.5 mV, a value noticeably larger than that of the equivalent FinFET (30 mV). Finally, using a fluctuation sensitivity map, we establish which regions of the device are the most sensitive to the line-edge roughness and the metal grain granularity variability effects. The on-current of the device is strongly affected by any line-edge roughness taking place near the source-gate junction or by metal grains localised between the middle of the gate and the proximity of the gate-source junction.
Keywords: nanowire field-effect transistors; variability effects; Monte Carlo; Schrödinger based quantum corrections; drift-diffusion
College: Faculty of Science and Engineering
Issue: 15
Start Page: 2391